OMAPL137BPTPH Datasheet, PDF (179/205 Pages) Texas Instruments – Low-Power Applications Processor

OMAPL137-HT
www.ti.com
SPRS677B – FEBRUARY 2012 – REVISED FEBRUARY 2013
Table 5-100. Power and Sleep Controller (PSC) Registers (continued)
PSC0
0x01C1 0018
0x01C1 0040
PSC1
0x01E2 7018
0x01E2 7040
Register
INTEVAL
MERRPR0
0x01C1 0050
0x01E2 7050
MERRCR0
0x01C1 0060
0x01C1 0068
0x01C1 0120
0x01C1 0128
0x01C1 0200
0x01C1 0204
0x01C1 0300
0x01C1 0304
0x01C1 0400
0x01C1 0404
0x01C1 0800 - 0x01C1 083C
0x01C1 0A00 - 0x01C1 0A3C
0x01E2 7060
0x01E2 7068
0x01E2 7120
0x01E2 7128
0x01E2 7200
0x01E2 7204
0x01E2 7300
0x01E2 7304
0x01E2 7400
0x01E2 7404
0x01E2 7800 - 0x01E2 787C
0x01E2 7A00 - 0x01E2 7A7C
PERRPR
PERRCR
PTCMD
PTSTAT
PDSTAT0
PDSTAT1
PDCTL0
PDCTL1
PDCFG0
PDCFG1
MDSTAT0-
MDSTAT15
MDSTAT0-
MDSTAT31
MDCTL0-
MDCTL15
MDCTL0-
MDCTL31
Description
Interrupt Evaluation Register
Module Error Pending Register 0 (module 0-15)
(PSC0)
Module Error Pending Register 0 (module 0-31)
(PSC1)
Module Error Clear Register 0 (module 0-15)
(PSC0)
Module Error Clear Register 0 (module 0-31)
(PSC1)
Power Error Pending Register
Power Error Clear Register
Power Domain Transition Command Register
Power Domain Transition Status Register
Power Domain 0 Status Register
Power Domain 1 Status Register
Power Domain 0 Control Register
Power Domain 1 Control Register
Power Domain 0 Configuration Register
Power Domain 1 Configuration Register
Module Status n Register (modules 0-15) (PSC0)
Module Status n Register (modules 0-31) (PSC1)
Module Control n Register (modules 0-15) (PSC0)
Module Control n Register (modules 0-31) (PSC1)
5.28.1 Power Domain and Module Topology
The device includes two PSC modules. Each PSC module consists of an Always On power domain and
an additional pseudo/internal power domain that manages the sleep modes for the RAMs present in the
DSP subsystem and the L3 RAM, respectively.
Each PSC module controls clock states for several of the on chip modules, controllers and interconnect
components. Table 5-101 and Table 5-102 lists the set of peripherals/modules that are controlled by the
PSC, the power domain they are associated with, the LPSC assignment and the default (power-on reset)
module states. See the device-specific data manual for the peripherals available on a given device. The
module states and terminology are defined in Section 5.28.1.2.
LPSC Number
0
1
2
3
4
5
6
7
8
9
Table 5-101. PSC0 Default Module Configuration
Module Name
EDMA3 Channel Controller
EDMA Transfer Controller 0
EDMA Transfer Controller 1
EMIFA (BR7)
SPI 0
MMC/SD 0
Arm Interrupt Controller —
ARM RAM/ROM —
-
UART 0
Power Domain
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0)
AlwaysON (PD0) —
AlwaysON (PD0) —
-
AlwaysON (PD0)
Default Module State
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable
SwRstDisable —
Enable —
-
SwRstDisable
Auto Sleep/Wake Only
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Yes —
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Peripheral Information and Electrical Specifications 179
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