TMS320DM641_08 Datasheet, PDF (159/179 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

Ethernet Media Access Controller (EMAC)
HEX ADDRESS RANGE
01C8 0200
01C8 0204
01C8 0208
01C8 020C
01C8 0210
01C8 0214
01C8 0218
01C8 021C
01C8 0220
01C8 0224
01C8 0228
01C8 022C
01C8 0230
01C8 0234
01C8 0238
01C8 023C
01C8 0240
01C8 0244
01C8 0248
01C8 024C
01C8 0250
01C8 0254
01C8 0258
01C8 025C
01C8 0260
01C8 0264
01C8 0268
01C8 026C
01C8 0270
01C8 0274
01C8 0278
01C8 027C
01C8 0280
01C8 0284
01C8 0288
01C8 028C
01C8 0290 − 01C8 05FF
Table 4−64. EMAC Statistics Registers
ACRONYM
RXGOODFRAMES
RXBCASTFRAMES
RXMCASTFRAMES
RXPAUSEFRAMES
RXCRCERRORS
RXALIGNCODEERRORS
RXOVERSIZED
RXJABBER
RXUNDERSIZED
RXFRAGMENTS
RXFILTERED
RXQOSFILTERED
RXOCTETS
TXGOODFRAMES
TXBCASTFRAMES
TXMCASTFRAMES
TXPAUSEFRAMES
TXDEFERRED
TXCOLLISION
TXSINGLECOLL
TXMULTICOLL
TXEXCESSIVECOLL
TXLATECOLL
TXUNDERRUN
TXCARRIERSLOSS
TXOCTETS
FRAME64
FRAME65T127
FRAME128T255
FRAME256T511
FRAME512T1023
FRAME1024TUP
NETOCTETS
RXSOFOVERRUNS
RXMOFOVERRUNS
RXDMAOVERRUNS
−
REGISTER NAME
Good Receive Frames Register
Broadcast Receive Frames Register
Multicast Receive Frames Register
Pause Receive Frames Register
Receive CRC Errors Register
Receive Alignment/Code Errors Register
Receive Oversized Frames Register
Receive Jabber Frames Register
Receive Undersized Frames Register
Receive Frame Fragments Register
Filtered Receive Frames Register
Reserved
Receive Octet Frames Register
Good Transmit Frames Register
Broadcast Transmit Frames Register
Multicast Transmit Frames Register
Pause Transmit Frames Register
Deferred Transmit Frames Register
Collision Register
Single Collision Transmit Frames Register
Multiple Collision Transmit Frames Register
Excessive Collisions Register
Late Collisions Register
Transmit Underrun Register
Transmit Carrier Sense Errors Register
Transmit Octet Frames Register
Transmit and Receive 64 Octet Frames Register
Transmit and Receive 65 to 127 Octet Frames Register
Transmit and Receive 128 to 255 Octet Frames Register
Transmit and Receive 256 to 511 Octet Frames Register
Transmit and Receive 512 to 1023 Octet Frames Register
Transmit and Receive 1024 or Above Octet Frames
Register
Network Octet Frames Register
Receive Start of Frame Overruns Register
Receive Middle of Frame Overruns Register
Receive DMA Overruns Register
Reserved
Table 4−65. EMAC Wrapper
HEX ADDRESS RANGE
01C8 1000 − 01C8 1FFF
01C8 2000 − 01C8 2FFF
ACRONYM
−
REGISTER NAME
EMAC Control Module Descriptor Memory
Reserved
June 2003 − Revised October 2005
SPRS222E 159