TMS320DM641_08 Datasheet, PDF (127/179 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

Multichannel Audio Serial Port (McASP0) Peripheral
MULTICHANNEL AUDIO SERIAL PORT (McASP) TIMING (CONTINUED)
2
1
2
AHCLKR/X (Falling Edge Polarity)
AHCLKR/X (Rising Edge Polarity)
ACLKR/X (CLKRP = CLKXP = 0)^†
ACLKR/X (CLKRP = CLKXP = 1)^‡
AFSR/X (Bit Width, 0 Bit Delay)
4
3
4
6
5
AFSR/X (Bit Width, 1 Bit Delay)
AFSR/X (Bit Width, 2 Bit Delay)
AFSR/X (Slot Width, 0 Bit Delay)
AFSR/X (Slot Width, 1 Bit Delay)
AFSR/X (Slot Width, 2 Bit Delay)
AXR[n] (Data In/Receive)
8
7
A0 A1
A30 A31 B0 B1
B30 B31 C0 C1 C2 C3
C31
† _{For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP receiver is configured for falling}
edge (to shift data in).
‡ _{For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP receiver is configured for rising}
edge (to shift data in).
Figure 4−35. McASP Input Timings
June 2003 − Revised October 2005
SPRS222E 127