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DAC8564 Datasheet, PDF (15/46 Pages) Texas Instruments – 16-Bit, Quad Channel, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER with 2.5V, 2ppm/°C Internal Reference
DAC8564
www.ti.com
SBAS403A – JUNE 2007 – REVISED NOVEMBER 2007
TYPICAL CHARACTERISTICS: DAC at VDD = 5V (continued)
At TA = +25°C, external reference used, DAC output not loaded, and all DAC codes in straight binary data format, unless
otherwise noted.
SIGNAL-TO-NOISE RATIO
vs OUTPUT FREQUENCY
94
VDD = 5V, External VREF = 4.9V
-1dB FSR Digital Input, fS = 225kSPS
Measurement Bandwidth = 20kHz
92
Ch A
90
Ch C
Ch B
88
Ch D
86
0
1
2
3
4
5
fOUT (kHz)
Figure 42.
FULL-SCALE SETTLING TIME:
5V RISING EDGE
Trigger Pulse 5V/div
0
-20
-40
-60
-80
-90
-120
-140
0
POWER SPECTRAL DENSITY
VDD = 5V, External VREF = 4.9V
fOUT = 1kHz, fS = 225kSPS
Measurement Bandwidth = 20kHz
5
10
15
20
Frequency (Hz)
Figure 43.
FULL-SCALE SETTLING TIME:
5V FALLING EDGE
Trigger Pulse 5V/div
Rising Edge
1V/div
VDD = 5V
Ext VREF = 4.096V
From Code: 0000h
To Code: FFFFh
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 44.
HALF-SCALE SETTLING TIME:
5V RISING EDGE
Trigger Pulse 5V/div
Rising
Edge
1V/div
VDD = 5V
Ext VREF = 4.096V
From Code: 4000h
To Code: CFFFh
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 46.
VDD = 5V
Ext VREF = 4.096V
From Code: FFFFh
To Code: 0000h
Falling
Edge
1V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 45.
HALF-SCALE SETTLING TIME:
5V FALLING EDGE
Trigger Pulse 5V/div
VDD = 5V
Ext VREF = 4.096V
From Code: CFFFh
To Code: 4000h
Falling
Edge
1V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 47.
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): DAC8564
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