TLC32046CFN Datasheet, PDF (13/56 Pages) Texas Instruments – Wide-Band Analog Interface Circuit

1.5 Terminal Functions
TERMINAL
I/O
NAME
NO.
DESCRIPTION
ANLG GND 17,18
Analog ground return for all internal analog circuits. Not internally connected to DGTL
GND.
AUX IN +
24 I Noninverting auxiliary analog input stage. AUX IN+ can be switched into the band-pass
filter and ADC path via software control. If the appropriate bit in the control register is
a 1, the auxiliary inputs replace the IN + and IN – inputs. If the bit is a 0, the IN + and IN –
inputs are used (see the DX Serial Data Word Format).
AUX IN –
23 I Inverting auxiliary analog input (see the above AUX IN + description).
DATA-DR
13 I The dual-word (telephone interface) mode, selected by applying an input logic level
between 0 and 5 V to DATA-DR, allows this terminal to function as a data input. The data
is then framed by the FSD signal and transmitted as an output to the DR line during
secondary communication. The functions FSD, D11OUT, and D10OUT are valid with
this mode selection (see Table 2–1).
CONTROL
When CONTROL is tied to VCC _–, the device is in the word or byte mode. The functions
WORD-BYTE, EODR, and EODX are valid in this mode. CONTROL is then used to
select either the word or byte mode (see Function Table).
DR
5 O DR is used to transmit the ADC output bits from the AIC to the TMS320 serial port. This
transmission of bits from the AIC to the TMS320 serial port is synchronized with
SHIFT CLK.
DX
12 I DX is used to receive the DAC input bits and timing and control information from the
TMS320. This serial transmission from the TMS320 serial port is synchronized with
SHIFT CLK.
D10OUT
11 O In the dual-word (telephone interface) mode, bit D10 of the control register is output to
D10OUT. When the device is reset, bit D10 is initialized to 0 (see DX Serial Data Word
Format). The output update is immediate upon changing bit D10.
EODX
End-of-data transmit. During the word-mode timing, a low-going pulse occurs on EODX
immediately after the 16 bits of DAC and control or register information have transmitted
from the TMS320 serial port to the AIC.This signal can be used to interrupt a
microprocessor upon completion of serial communications. Also, this signal can be
used to strobe and enable external serial-to-parallel shift registers, latches, or external
FIFO RAM and to facilitate parallel data bus communications between the DSP and the
serial-to-parallel shift registers. During the byte-mode timing, this signal goes low after
the first byte has been transmitted from the TMS320 serial port to the AIC and is kept
low until the second byte has been transmitted. The TMS320C17 can use this low-going
signal to differentiate first and second bytes.
D11OUT
3 O In the dual-word (telephone interface) mode, bit D11 of the control register is output to
D11OUT. When the device is reset, bit D11 is initialized to 0 (see DX Serial Data Word
Format). The output update is immediate upon changing bit D11.
EODR
End-of-data receive. During the word-mode timing, a low-going pulse occurs on EODR
immediately after the 16 bits of A/D information have been transmitted from the AIC to
the TMS320 serial port. This signal can be used to interrupt a microprocessor upon
completion of serial communications. Also, this signal can be used to strobe and enable
external serial-to-parallel shift registers, latches, or external FIFO RAM, and to facilitate
parallel data bus communications between the DSP and the serial-to-parallel shift
registers. During the byte-mode timing, this signal goes low after the first byte has been
transmitted from the AIC to the TMS320 serial port and is kept low until the second byte
has been transmitted. The TMS320C17 can use this low-going signal to differentiate
between first and second bytes.
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