TLK2201 Datasheet, PDF (11/19 Pages) Texas Instruments – ETHERNET TRANSCEIVERS

TLK2201, TLK2201I
ETHERNET TRANSCEIVERS
SLLS420C – JUNE 2000 – REVISED NOVEMBER 2001
recommended operating conditions
Supply voltage, VDD, VDD(A)
Total supply current IDD, IDD(A)
Frequency = 1.25 Gbps,
Frequency = 1.6 Gbps,
PRBS pattern
Worst case pattern^†
Total power dissipation PD
Frequency = 1.25 Gbps
Frequency = 1.6 Gbps
PRBS pattern
Worst case pattern^†
Total shutdown current IDD, IDD(A)
Startup lock time, PLL
Operating free-air temperature, TA
Enable = 0,
Vdda , Vdd = 2.7 V
VDD, VDD(A) = 2.5 V, EN↑ to PLL acquire
TLK2201
TLK2201I
† _{Worst case pattern is a pattern that creates a maximum transition density on the serial transceiver.}
MIN NOM MAX UNIT
2.3 2.5 2.7 V
80
mA
111
200
mW
310
50 µA
500 µs
0
70
°C
–40
85
TLK2201 reference clock (REFCLK) timing requirements over recommended operating conditions
(unless otherwise noted)
Frequency
Frequency
Accuracy
Duty cycle
Jitter
PARAMETER
TEST CONDITIONS
Minimum data rate
Maximum data rate
Random plus deterministic
MIN
TYP–0.01%
TYP–0.01%
–100
40%
TYP
100
160
50%
MAX
TYP–0.01%
TYP–0.01%
100
60%
40
UNIT
MHz
MHz
ppm
ps
TLK2201I reference clock (REFCLK) timing requirements over recommended operating
conditions (unless otherwise noted)
Frequency
Frequency
Accuracy
Duty cycle
Jitter
PARAMETER
TEST CONDITIONS
Minimum data rate
Maximum data rate
Random plus deterministic
MIN
TYP–0.01%
TYP–0.01%
–100
40%
TYP
120
160
50%
MAX
TYP–0.01%
TYP–0.01%
100
60%
40
UNIT
MHz
MHz
ppm
ps
TTL electrical characteristics over recommended operating conditions (unless otherwise noted)
VOH
VOL
VIH
VIL
IIH
IIL
CIN
PARAMETER
High-level output voltage
Low-level output voltage
High-level input voltage
Low-level input voltage
Input high current
Input low current
TEST CONDITIONS
IOH = –400 µA
IOL = 1 mA
VDD = 2.3 V,
VDD = 2.3 V,
VIN = 2.0 V
VIN = 0.4 V
MIN
VDD –0.2
GND
1.7
–40
TYP MAX UNIT
2.3
V
0.25 0.5 V
3.6 V
0.8 V
40 µA
µA
4 pf
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