THCV217_16 Datasheet, PDF (27/35 Pages) THine Electronics, Inc. – V-by-One HS High-speed Video Data Transmitter and Receiver

THCV217 Input Data Mapping
Data Signals
10bit
(30bpp)
8bit
(24bpp)
Transm itter
Input Pin Nam e
10bit
(30bpp)
8bit
(24bpp)
Sym bol defined
by V-by-One® HS
R0*1
R1*1
R2
R3
R4
R5
R6
R7
R8
R9
G0*1
G1*1
G2
G3
G4
G5
G6
G7
G8
G9
B0*1
B1*1
B2*1
B3*1
B4*1
B5*1
B6*1
B7*1
B8*1
B9*1
CONT1*1*2
CONT2*1*2
HSYNC
VSYNC
DE
-
-
R0
R1
R2
R3
R4
R5
R6
R7
-
-
G0
G1
G2
G3
G4
G5
G6
G7
-
-
B0*1
B1*1
B2*1
B3*1
B4*1
B5*1
B6*1
B7*1
-
-
HSYNC
VSYNC
DE
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
CONT11
CONT12
HSYNC
VSYNC
DE
-
-
R12
R13
R14
R15
R16
R17
R18
R19
-
-
G12
G13
G14
G15
G16
G17
G18
G19
-
-
B12
B13
B14
B15
B16
B17
B18
B19
-
-
HSYNC
VSYNC
DE
D30
D31
D0
D1
D2
D3
D4
D5
D6
D7
D28
D29
D8
D9
D10
D11
D12
D13
D14
D15
D26
D27
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
HSYNC
VSYNC
DE
*1 CTL bits, which are carried during DE=Low except the 1st and the last pixel.
*2 3D flags defined in the V-by-One® HS Standard are assigned to the following bit.
V-by-One® HS Standard Packer/Unpacker D[24](3DLR) <=> CONT2
V-by-One® HS Standard Packer/Unpacker D[25](3DEN) <=> CONT1
Table 19. CMOS Input Data Mapping for Single-in/Single-out, Single-in/Dual-out mode
THCV217-THCV218_Rev.2.11_E
27
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THine Electronics, Inc.
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