THCV217_16 Datasheet, PDF (15/35 Pages) THine Electronics, Inc. – V-by-One HS High-speed Video Data Transmitter and Receiver

Field BET Operation
In order to help users to debug high-speed serial links (CML lines), THCV217 and THCV218 have an
operation mode in which they act as the bit error tester (BET). In this mode, THCV217 internally generates a
test pattern, which is then serialized onto CML high-speed lines. THCV218 receives the data stream and checks
the sampled data for bit errors.
This "Field BET" mode is activated by setting BET= H on THCV217, and BET=H and Reserved7=L on
THCV218.
In the Field BET mode, the on-chip pattern generator on THCV217 is enabled and generates the test pattern as
long as the clock is applied onto CLKIN. Other CMOS data inputs are ignored. The generated data pattern is
then 8b/10b encoded, scrambled, and serialized onto CML channels. As for THCV218, the internal test pattern
check circuit gets enabled and the pattern check result is output on BETOUT. The BETOUT pin goes LOW
whenever bit errors occur, and it stays HIGH when there is no bit error. Please refer to Figure 7 and Figure 8.
Table 5 shows possible combinations of Tx and Rx for normal operation and Field BET operation.
THCV217
THCV218
TTL data inputs
are ignored
CLKIN
Test Pattern
Generator
Test
Pattern
Checker
BETOUT
BET=H
Test Point
BET=H
for
Reserved7=L ^{Field BET}
Figure 7. Field BET Configuration
Normal
Operation
THCV217,218
BET
RXmp/n
m=0,1
Field BET
Operation
Bit Error
Bit Error
BETOUT
Figure 8. Relationship between bit error and BETOUT
Tx
Rx
1
THCV217
THCV218
2
THCV215
THCV218
3
THCV217
THCV216
Table 5. Possible combinations of Tx and Rx for Field BET mode
THCV217-THCV218_Rev.2.11_E
15
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