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THCV231_16 Datasheet, PDF (14/56 Pages) THine Electronics, Inc. – The THCV231 and THCV236 are designed to support video data transmission between the host and display.
Field BET Operation
In order to help users to check validity of CML serial line (Main-Link and Sub-Link), the THCV231 and
THCV236 have an operation mode in which they act as a bit error tester (BET). In Main-Link Field BET mode,
the THCV231 internally generates a test pattern which is then serialized onto the Main-Link CML line. The
THCV236 also has BET function mode. The THCV236 receives the data stream and checks bit errors. The
generated data pattern is then 8b/10b encoded, scrambled, and serialized onto the CML channel. As for the
THCV236, the internal test pattern check circuit gets enabled and reports result on a certain pin named BETOUT.
In Sub-Link Field BET mode, Sub-Link Master device internally generates test pattern which is then serialized
onto the Sub-Link CML line. Sub-Link Slave device also has BET function mode. Sub-Link Slave device
receives the data stream and checks bit errors. Note that Sub-Link Slave device must be set this mode prior to
Sub-Link Master device. Pattern check result is output from BETOUT pin of the Sub-Link Slave device. The
BETOUT pin goes LOW whenever bit errors occur, or it stays HIGH when there is no bit error.
In Main-Link Field BET mode, user can select two kinds of check result, latched result or NOT latched result
by setting LATEN pin input. The latched result is reset by setting LATEN=0. In Sub-Link Field BET mode, only
latched result is available. In order to reset the latched result, please once turn off the power and entry Sub-Link
Field BET from power on sequence.
GPIO4 pin (THCV231) and LATEN/SD3/AIN1/GPIO0 pin (THCV236) function as LATEN in Field BET
mode (Main-Link or Sub-Link).
It is not possible to realize Main-Link Field BET and Sub-Link Field BET at the same time.
Table 11. Main-Link Field BET Operation Settings
PDN0/PDN1/PDN
THCV231/236
Common Setting
SUBMODE
BET
BET_SEL
THCV236
Setting
LATEN
Main-Link
Condition
Sub-Link
Output Latch
Select
1
0
1
0
(*1)
(*2)
0
1
*1 THCV231: Register setting (0x53 bit1), THCV236: Pin setting
*2 Register setting (0x53 bit0, Default 0)
Field BET
Operation
Normal
Operation
NOT Latched Result
Latched Result
Table 12. THCV236 Main-Link Field BET Result
BETOUT
Output
L
Bit Error Occurred
H
No Error
THCV231_THCV236_Rev.2.30_E
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