71M6533 Datasheet, PDF (5/124 Pages) Teridian Semiconductor Corporation – Energy Meter IC

FDS_6533_6534_004
71M6533/71M6534 Data Sheet
Figures
Figure 1: IC Functional Block Diagram ......................................................................................................... 8
Figure 2: General Topology of a Chopped Amplifier .................................................................................. 12
Figure 3: CROSS Signal with CHOP_E = 00.............................................................................................. 13
Figure 4: AFE Block Diagram ..................................................................................................................... 14
Figure 5: Samples from Multiplexer Cycle .................................................................................................. 17
Figure 6: Accumulation Interval .................................................................................................................. 17
Figure 7: Interrupt Structure ........................................................................................................................ 36
Figure 8: Optical Interface........................................................................................................................... 42
Figure 9: Connecting an External Load to DIO Pins ................................................................................... 45
Figure 10: 3-wire Interface. Write Command, HiZ=0. ................................................................................ 48
Figure 11: 3-wire Interface. Write Command, HiZ=1 ................................................................................. 48
Figure 12: 3-wire Interface. Read Command............................................................................................. 48
Figure 13: 3-Wire Interface. Write Command when CNT=0 ...................................................................... 49
Figure 14: 3-wire Interface. Write Command when HiZ=1 and WFR=1. ................................................... 49
Figure 15: SPI Slave Port: Typical Read and Write operations .................................................................. 50
Figure 16: Functions defined by V1 ............................................................................................................ 51
Figure 17: Voltage, Current, Momentary and Accumulated Energy ........................................................... 53
Figure 18: Timing Relationship between ADC MUX and Compute Engine ................................................ 54
Figure 19: RTM Output Format ................................................................................................................... 54
Figure 20: Operation Modes State Diagram ............................................................................................... 55
Figure 21: Functional Blocks in BROWNOUT Mode .................................................................................. 58
Figure 22: Functional Blocks in LCD Mode................................................................................................. 59
Figure 23: Functional Blocks in SLEEP Mode ............................................................................................ 60
Figure 24: Transition from BROWNOUT to MISSION Mode when System Power Returns ...................... 61
Figure 25: Power-Up Timing with V3P3SYS and VBAT tied together ........................................................ 61
Figure 26: Power-Up Timing with VBAT only.............................................................................................. 62
Figure 27: Wake Up Timing ........................................................................................................................ 63
Figure 28: MPU/CE Data Flow.................................................................................................................... 64
Figure 29: MPU/CE Communication ........................................................................................................... 64
Figure 30: Resistive Voltage Divider ........................................................................................................... 65
Figure 31: CT with Single Ended (Left) and Differential Input (Right) Connection ..................................... 65
Figure 32: Resistive Shunt (Left), Rogowski Sensor (Right) ...................................................................... 65
Figure 33: Connecting LCDs....................................................................................................................... 68
Figure 34: I²C EEPROM Connection .......................................................................................................... 68
Figure 35: Three-Wire EEPROM Connection ............................................................................................. 69
Figure 36: Connections for UART0 ............................................................................................................. 69
Figure 37: Connection for Optical Components.......................................................................................... 70
Figure 38: Voltage Divider for V1 ................................................................................................................ 71
Figure 39: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right) ........ 71
Figure 40: External Components for the Emulator Interface ...................................................................... 72
Figure 41: Connecting a Battery ................................................................................................................. 72
Figure 42: CE Data Flow: Multiplexer and ADC........................................................................................ 100
Figure 43: CE Data Flow: Scaling, Gain Control, Intermediate Variables ................................................ 100
Figure 44: CE Data Flow: Squaring and Summation Stages.................................................................... 101
Figure 45: SPI Slave Port (MISSION Mode) Timing ................................................................................. 111
Figure 46: Wh Accuracy (0.1 A - 200 A, 240 V, Room Temperature) at Various Frequencies (Differential
Mode, CTs) ........................................................................................................................................ 112
Figure 47: Typical Wh Accuracy (0.02 A - 200 A, 240 V, Room Temperature), Various Load Angles
(Differential Mode, CTs)..................................................................................................................... 112
Figure 48: 71M6533/6533H 100-pin LQFP Package Outline ................................................................... 113
Figure 49: 71M6534/6534H 120-pin LQFP Package Outline ................................................................... 114
Figure 50: Pinout for 71M6533/71M6533H LQFP-100 Package .............................................................. 115
Figure 51: Pinout for 71M6534/71M6534H LQFP-120 Package .............................................................. 116
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