STM32W108C8 Datasheet, PDF (68/275 Pages) –

System modules
STM32W108C8
Sleep timer compare B low register (SLPTMR_CMPBL)
Address:
Reset value:
0x4000 6024
0x0000 FFFF
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CMPBL[15:0]
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value
Bits 15:0 CMPBL[15:0]: Sleep timer compare B low value
Writing to this register puts the value in the hold register until a write to the SLPTMR_CMPBH
register. The value can only be changed when the sleep timer is enabled (EN bit set to ‘0’ in
the SLPTMR_CR register) is set to ‘0’. If the value is changed when the sleep timer is
enabled (EN bit set to ‘1’ in the SLPTMR_CR register), a spurious interrupt may be
generated. Therefore it is recommended to disable interrupts before changing this register.
Sleep timer interrupt source register (SLPTMR_ISR)
Address:
Reset value:
0x4000 A014
0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
CMPB CMPA WRAP
rw
rw
rw
Bits 31:3 Reserved, must be kept at reset value
Bit 2 CMPB: Sleep timer compare B
Bit 1 CMPA: Sleep timer compare A
Bit 0 WRAP: Sleep timer wrap
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