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STD11N65M2 Datasheet, PDF (3/21 Pages) STMicroelectronics – Extremely low gate charge
STD11N65M2, STP11N65M2, STU11N65M2
1
Electrical ratings
Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter
Value
VGS
(1)
ID
(1)
ID
(2)
IDM
(1)
PTOT
(3)
dv/dt
(4)
dv/dt
Gate-source voltage
Drain current (continuous) at Tc = 25 °C
Drain current (continuous) at Tc = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Peak diode recovery voltage slope
(starting Tj = 25 °C, ID= IAS, VDD = 50 V)
MOSFET dv/dt ruggedness
VISO
Insulation withstand voltage (RMS) from all
three leads to external heat sink
(t = 1 s; TC = 25 °C)
Tstg Storage temperature
Tj
Max. operating junction temperature
1. The value is rated according to Rthj-case and limited by package.
2. Pulse width limited by Tjmax
3. ISD ≤ 7 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD=80% V(BR)DSS.
4. VDS ≤ 520 V
± 25
7
4.4
28
85
15
50
2500
- 55 to 150
150
Unit
V
A
A
A
W
V/ns
V/ns
V
°C
Table 3. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case max
Rthj-amb Thermal resistance junction-amb max
(1)
Rthj-pcb Thermal resistance junction-pcb max
1. When mounted on 1 inch² FR-4 board, 2 oz Cu
DPAK
50
Value
TO-220
1.47
62.5
IPAK
100
Unit
°C/W
°C/W
°C/W
Symbol
Table 4. Avalanche characteristics
Parameter
Value
Unit
Avalanche current, repetitive or not
IAR
repetitive (pulse width limited by Tjmax)
Single pulse avalanche energy (starting
EAS
Tj=25°C, ID= IAR; VDD=50)
1.5
A
110
mJ
DocID026376 Rev 1
3/21
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