STE2007 Datasheet, PDF (16/62 Pages) STMicroelectronics – 96 x 68 Single Chip LCD Controller/Driver

4 INTERFACE
4 INTERFACE
STE2007
4.1 3-lines 9 bit Serial Interface
STE2007 3-lines 9 bits serial interface is a bidirectional link between the display driver and the
host processor.
It consists of three lines:
– SDAIN/SDAOUT Serial Data
– SCLK Serial Clock
– !CS Peripheral enable: - Active Low- Enables and Disables the serial interface
The serial interface is active only if the !CS line is low. If !CS is low after the positive edge of
!RES, the serial interface is ready to receive data after the internal reset time. Serial data must
be input to SDA in the sequence D/!C, D7 to D0. STE2007 read data on SCLK rising edge. The
first bit of serial data D/!C is data/command flag. When D/!C =”1” D7 to D0 bits are display RAM
data or Command Parameters. When D/!C=”0” D7 to D0 bits identify a command
4.1.1
MCU TxData Mode (Write Mode)
STE2007 is always a slave device on the communication bus and receive the communication
clock on the SCLK pin from the master. Information are exchanged word-wide. Every word is
composed by 9 bit. The first bit is named D/!C and indicates whether the following byte is a
command (D/!C =0) or a Display Data Byte (D/!C =1).
During data transfer, the data line is sampled by the receiver unit on the SCLK rising edge.
The data/command received is transferred to DDRAM or Executed on the first falling edge after
the latching rising edge or on the !CS rising edge.
If !CS stays low after the last bit of a command/data byte, the serial interface expects the D/!C
bit of the next data byte on the next SCLK positive edge.
A reset pulse on !RES pin interrupts any transmission.
Figure 5.
!CS
SDA
D/C D7 D6 D5 D4 D3 D2 D1 D0 D/C D7 D6 D5 D4
SCLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14
4.1.1.1 Data/Command Transfer break
If the Host processor generates an break condition (!CS Line HIGH before having received Bit
D0) while transferring a Data byte to the Frame Memory or a Command identifier or a command
parameter, the not complete received byte is discarded, the communication is interrupted and
the interface is forced in reset state.
When !CS line becomes low again to start a new communication session STE2007 is ready to
receive the same byte interrupted re-transmitted or a new command identifier.
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