S71WS512N Datasheet, PDF (2/18 Pages) SPANSION – Migrating from the S71WS512N to the S71WS512P

Application Note
2. Performance Characteristics
The 90 nm MirrorBit^™ technology, on which the S29WS512P is based, allows performance improvements
over the S29WS256N, which is based on 110 nm MirrorBit technology. Table 2.1 shows the performance
comparison between the two devices.
Table 2.1 Performance Comparison
Access Time
Read Access Time
VCC=1.70 V to 1.95 V
CL=30pF
Single Word Programming Time
Max. Async. Access (t_ACC)
Max. Async. Page Access (t_PACC)
Max. Sync. Burst Access (t_BACC)
Typ
Max (See Note)
Total 32-Words Buffer Programming Time
Typ
Max (See Note)
Effective Word Programming Time
Typ
Max (See Note)
Sector Erase Time
Typ
Max (See Note)
S29WS256N
80 ns
20 ns
9 ns
40 µs
400 µs
300 µs
3000 µs
9.4 µs
94 µs
150 ms: 16 K-words
600 ms: 64 K-words
2000 ms: 16 K-words
3500 ms: 64 K-words
S29WS512P
80 ns
20 ns
7 ns
30 µs
150 µs
192 µs
960 µs
6 µs
30 µs
150 ms: 16 K-words
600 ms: 64 K-words
1750 ms: 16 K-words
3000 ms: 64 K-words
Note:
Under worst case conditions of 90°C. V_CC = 1.70 V. 100,000 cycles.
3. Electrical Specification Changes
I/O Descriptions - Package and Pin Layout
There are also a few hardware changes required for the migration. Since the entire S29WS512P is
addressed with a single chip select, address line A24 has to be connected. Note that some systems may
require a pull down resistor on A24. The two block diagrams in Figure 3.1 illustrate these changes.
F-VCC
Flash-only Address
Shared Address
CLK
WP#
ACC
F1-CE#
OE#
WE#
F-RST#
AVD#
F2-CE#
R-VCC
R-CE1#
R-UB#
R-LB#
R-CE2
R-CRE
Figure 3.1 Block Diagrams
22
VCC VID
16
DQ15 to DQ0
CLK
WP#
ACC
CE#
Flash 1
OE#
Flash 2
WE#
RESET#
AVD#
RDY
22
V_CC
V_CCQ
16
CLK ^{I/O15 to I/O0}
CE#
WE# pSRAM
OE#
UB#
LB#
WAIT#
VSSQ
AVD#
CRE#
DQ15 to DQ0
RDY
V_SS
A0-A22
A23
A24 (Note)
CLK
AVD#
F-CE#
F-OE#
F-RST#
F-ACC
F-WP#
F-WE#
R-CE#
R-OE#
R-LB#
R-UB#
R-WE#
R-CRE
S71WS-N
Note:
Pull down resistor may be required for some systems.
A0-A22
A23
A24 (Note)
CLK
AVD#
CE#
OE#
RESET#
ACC
WP#
WE#
WS512P
Flash
Memory
DQ0-DQ15
RDY
VSS
VCC
VCCQ
A0-A22
CLK
AVD#
CE#
OE#
LB#
UB#
WE#
CRE
DQ0-DQ15
128Mb
WAIT#
CellularRAM
Memory
VSS
VCC
VCCQ
S71WS-P
DQ0-DQ15
RDY/WAIT
VSS
F-VCC
VCCQ
R-VCC
2
S71WS512N to S71WS512P
2xWS-N_to_WS-P_AN_01E October 3, 2006