LAN9218 Datasheet, PDF (97/130 Pages) SMSC Corporation – High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX

High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
5.4.3 ADDRL—MAC Address Low Register
Offset:
Default Value:
3
FFFFFFFFh
Attribute:
Size:
R/W
32 bits
The MAC Address Low register contains the lower 32 bits of the physical address of the MAC. The
contents of this register are optionally loaded from the EEPROM at power-on through the EEPROM
Controller if a programmed EEPROM is detected. The least significant byte of this register (bits [7:0])
is loaded from address 0x01 of the EEPROM. The most significant byte of this register is loaded from
address 0x04 of the EEPROM. Please refer to Section 4.6 for more information on the EEPROM.
BITS
31-0
DESCRIPTION
Physical Address [31:0]. This field contains the lower 32 bits (31:0) of the Physical Address of the
LAN9218 device. The content of this field is undefined until loaded from the EEPROM at power-on.
The host can update the contents of this field after the initialization process has completed.
Table 5.7 below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the
reception of the Ethernet physical address. Also shown is the correlation between the EEPROM
addresses and ADDRL and ADDRH registers.
Table 5.7 ADDRL, ADDRH and EEPROM Byte Ordering
EEPROM ADDRESS
0x01
0x02
0x03
0x04
0x05
0x06
ADDRN
ADDRL[7:0]
ADDRL[15:8]
ADDRL[23:16]
ADDRL[31:24]
ADDRH[7:0]
ADDRH[15:8]
ORDER OF RECEPTION ON
ETHERNET
1^st
2^nd
3^rd
4^th
5^th
6^th
As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and
ADDRH registers would be programmed as shown in Figure 5.2. The values required to automatically
load this configuration from the EEPROM are also shown.
31 24 23 16 15 8 7 0
xx
xx
0xBC 0x9A
ADDRH
31 24 23 16 15 8 7
0
0x78 0x56 0x34 0x12
ADDRL
0x06 0xBC
0x05 0x9A
0x04 0x78
0x03 0x56
0x02 0x34
0x01 0x12
0x00 0xA5
EEPROM
Figure 5.2 Example ADDRL, ADDRH and EEPROM Setup
Note: By convention, the left most byte of the Ethernet address (in this example 0x12) is the most
significant byte and is transmitted/received first.
SMSC LAN9218
97
DATASHEET
Revision 1.5 (07-18-06)