LAN83C180_01 Datasheet, PDF (1/22 Pages) SMSC Corporation – 10/100 Fast Ethernet PHY Transceiver

LAN83C180
PRELIMINARY
10/100 Fast Ethernet PHY Transceiver
FEATURES
Single Chip 100Base-TX/10Base-T Ethernet
Physical Layer (PHY) Solution
Dual Speed – 10/100 Mbps
Full MII Interface for a Glueless MAC Connection
MI Interface for Configuration and Status
Half Duplex and Full Duplex in Both 10BASE-T and
100BASE-TX
Repeater Mode
Extended Register Set
Integrated 10BASE-T Transceivers and
Receive/Transmit Filters
Integrated Adaptive Equalizer and Base Line
Wander Correction
Full Auto Negotiation Support for 10BASE-T and
100BASE-TX Both Half and Full Duplex
Parallel Detection for Supporting Non Auto
Negotiation Legacy in Link Partners
Low Current
Low Power Mode
Internal Power on Reset
Single Magnetics for 10BASE-T and 100BASE-TX
Operation for a Single RJ45 Connector
Support for IEEE-802.3x Flow Control Specification
5 Integrated Status LED Drivers
- Full Duplex
- 10/100
- Activity
- Collision
- Link
Low External Component Count
64 Pin TQFP Package (1.0 mm Body Thickness)
GENERAL DESCRIPTION
The LAN83C180 is a single chip CMOS physical layer (PHY) solution providing all necessary functions between the
Media Independent Interface (MII) and the magnetics connected to Category 5 twisted pair media. It is designed for
10BASE-T and 100BASE-TX Ethernet, and is based on the IEEE 802.3 specifications.
The LAN83C180 is compatible with the Auto Negotiation section of IEEE 802.3u and provides all the support needed
for the IEEE 802.3x Full Duplex specification. The LAN83C180 can operate in adapter mode or repeater/switch
modes.
ORDERING INFORMATION
Order Number: LAN83C180 TQFP
64 Pin TQFP Package
SMSC DS – LAN83C180
Rev. 08/24/2001