SI8410BB-D-IS Datasheet, PDF (9/30 Pages) Silicon Laboratories – LOW-POWER SINGLE AND DUAL-CHANNEL DIGITAL ISOLATORS

Si8410/20/21
Table 4. Electrical Characteristics (Continued)
(V_DD1 = 3.3 V ±10%, V_DD2 = 3.3 V ±10%, T_A = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)
Si8410Bx
V_DD1
V_DD2
—
1.3
2.0
mA
—
1.2
1.8
Si8420Bx
V_DD1
—
2.0
3.0
V_DD2
—
2.1
3.2
Si8421Bx
d V_DD1
V_DD2
—
2.2
3.3
—
2.2
3.3
e _{100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)}
d _Si8410Bx
n ^VDD1
s _VDD2
e _{n Si8420Bx}
V_DD1
m _ig V_DD2
Si8421Bx
m ^{s V}DD1
o ^{e VDD2}
—
—
—
—
—
—
Timing Characteristics
1.3
2.0
3.3
4.9
2.0
3.0
6.5
8.1
4.4
5.5
4.4
5.5
c ^D _{Si8410Ax, Si8420Ax, Si8421Ax}
e Maximum Data Rate
0
w _{Minimum Pulse Width}
—
R _{e Propagation Delay}
t_PHL, t_PLH See Figure 1
—
t _{Pulse Width Distortion}
o ^{N |tPLH – tPHL|}
Propagation Delay Skew²
PWD
See Figure 1
—
t_PSK(P-P)
—
N ^{r Channel-Channel Skew}
t_PSK
—
fo ^Notes:
—
1.0
—
250
—
35
—
25
—
40
—
35
mA
mA
mA
mA
mA
Mbps
ns
ns
ns
ns
ns
1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
9