SI8410BB-D-IS Datasheet, PDF (10/30 Pages) Silicon Laboratories – LOW-POWER SINGLE AND DUAL-CHANNEL DIGITAL ISOLATORS

Si8410/20/21
Table 4. Electrical Characteristics (Continued)
(V_DD1 = 3.3 V ±10%, V_DD2 = 3.3 V ±10%, T_A = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
Si8410Bx, Si8420Bx, Si8421Bx
Maximum Data Rate
0
—
150 Mbps
Minimum Pulse Width
—
—
6.0
ns
Propagation Delay
t_PHL, t_PLH See Figure 1
3.0
6.0
9.5
ns
Pulse Width Distortion
PWD
See Figure 1
—
1.5
2.5
ns
|t_PLH – t_PHL|
Propagation Delay Skew²
t_PSK(P-P)
—
2.0
3.0
ns
d ^{Channel-Channel Skew}
t_PSK
—
0.5
1.8
ns
All Models
e _{Output Rise Time}
t_r
C_L = 15 pF
—
4.3
6.1
ns
d _{Output Fall Time}
t_f
C_L = 15 pF
—
3.0
4.3
ns
n ^{Common Mode Transient}
s _Immunity
e _{n Start-up Time3}
CMTI V_I = V_DD or 0 V
—
t_SU
—
25
— kV/µs
15
40
µs
Notes:
m ig 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
m ^{s where transmission line effects will be a factor, output pins should be appropriately terminated with controlled}
impedance PCB traces.
o e 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
Not ^{Rfoer cNew D 3. Start-up time is the time period from the application of power to valid data at the output.}
10
Rev. 1.5