SI8410BB-D-IS Datasheet, PDF (12/30 Pages) Silicon Laboratories – LOW-POWER SINGLE AND DUAL-CHANNEL DIGITAL ISOLATORS

Si8410/20/21
Table 5. Electrical Characteristics¹ (Continued)
(V_DD1 = 2.70 V, V_DD2 = 2.70 V, T_A = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)
Si8410Bx
V_DD1
V_DD2
—
1.3
2.0
—
1.2
1.8
Si8420Bx
V_DD1
V_DD2
—
2.0
3.0
—
2.1
3.2
Si8421Bx
d _VDD1
e ^VDD2
—
2.2
3.3
—
2.2
3.3
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
d _Si8410Bx
n _{s VDD1}
e ^VDD2
n _Si8420Bx
m _ig ^VDD1
V_DD2
m ^{s Si8421Bx}
V_DD1
o ^{e VDD2}
—
—
—
—
—
—
Timing Characteristics
1.3
2.0
2.7
4.0
2.0
3.0
5.2
6.5
3.7
4.6
3.7
4.6
c ^D _{Si8410Ax, Si8420Ax, Si8421Ax}
e _{Maximum Data Rate}
0
—
1.0
R ^{w Minimum Pulse Width}
—
—
250
t ^{e Propagation Delay}
t_PHL, t_PLH See Figure 1
—
o ^{N Pulse Width Distortion}
|t_PLH - t_PHL|
PWD
See Figure 1
—
N ^{r Propagation Delay Skew3}
t_PSK(P-P)
—
—
35
—
25
—
40
fo ^{Channel-Channel Skew}
t_PSK
—
—
35
mA
mA
mA
mA
mA
mA
Mbps
ns
ns
ns
ns
ns
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T_A = 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to valid data at the output.
12
Rev. 1.5