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SI86XX Datasheet, PDF (8/52 Pages) Silicon Laboratories – No start-up initialization required
Si86xx
Table 2. Electrical Characteristics (Continued)
(VDD1 = 5 V±10%, VDD2 = 5 V±10%, TA = –40 to 125 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Si8662Ax
VDD1
VDD2
Si8663Ax
VDD1
VDD2
—
—
—
—
Timing Characteristics
5.1
7.1
mA
4.7
6.6
4.9
6.8
mA
4.9
6.8
All Models
Maximum Data Rate
0
—
1
Mbps
Minimum Pulse Width
—
—
250
ns
Propagation Delay
Pulse Width Distortion
|tPLH – tPHL|
Propagation Delay Skew2
Channel-Channel Skew
Output Rise Time
tPHL, tPLH
PWD
tPSK(P-P)
tPSK
tr
See Figure 2
See Figure 2
CL = 15 pF
See Figure 2
—
—
35
ns
—
—
25
ns
—
—
40
ns
—
—
35
ns
—
2.5
4.0
ns
Output Fall Time
tf
CL = 15 pF
See Figure 2
—
2.5
4.0
ns
Peak eye diagram jitter
Common Mode
Transient Immunity
tJIT(PK)
CMTI
See Figure 8
VI = VDD or 0 V
VCM = 1500 V (see
Figure 3)
—
350
—
ps
35
50
—
kV/µs
Enable to Data Valid
ten1
See Figure 1
—
6.0
11
ns
Enable to Data Tri-State
ten2
Start-up Time3
tSU
See Figure 1
—
8.0
12
ns
—
15
40
µs
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
8
Rev. 1.0