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SI53303 Datasheet, PDF (8/30 Pages) Silicon Laboratories – DUAL 1:5 LOW JITTER BUFFER/LEVEL TRANSLATOR
Si53303
Table 9. AC Characteristics (Continued)
(VDD = 1.8 V 5%, 2.5 V  5%, or 3.3 V 10%,TA = –40 to 85 C)
Parameter
Symbol
Test Condition
Min
Output to Output
Skew
TSK
Identical Configuration, Single-
—
ended (QN to QM)
Part to Part Skew3
Identical Configuration, Differen-
—
tial (QN to QM)
TPS
Identical configuration
—
Power Supply Noise PSRR
10 kHz sinusoidal noise
—
Rejection4
100 kHz sinusoidal noise
—
Typ
Max
Unit
—
100
ps
—
50
ps
50
—
ps
–90
—
dBc
–90
—
dBc
500 kHz sinusoidal noise
—
–80
—
dBc
1 MHz sinusoidal noise
—
–70
—
dBc
Notes:
1. For clock division applications, a minimum input clock slew rate of 30 mV/ns is required.
2. See Figure 4.
3. Defined as skew between outputs on different devices operating at the same supply voltages, temperatures, and equal
load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
4. Measured for 156.25 MHz carrier frequency. Sine-wave noise added to VDDOX (1.8V=50mVPP, 2.5/3.3V=100mVPP)
and noise spur amplitude measured. See AN491 for further details.
8
Preliminary Rev. 0.4