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SI53156 Datasheet, PDF (6/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER
Si53156
Table 2. AC Electrical Specifications (Continued)
Parameter
Symbol
Condition
Min Typ
Enable/Disable and Setup
Clock Stabilization from Power-Up TSTABLE
Stopclock Set-up Time
TSS
–
—
10.0 —
Notes:
1. Gen 4 specifications based on the PCI-Express Base Specification 4.0 rev. 0.5.
2. Download the Silicon Labs PCIe Clock Jitter Tool at www.silabs.com/pcie-learningcenter.
Max Unit
5
ms
—
ns
Table 3. Absolute Maximum Conditions
Parameter
Main Supply Voltage
Input Voltage
Temperature, Storage
Industrial Temperature, Operating
Ambient
Commercial Temperature, Operating
Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Flammability Rating
Symbol
VDD_3.3V
VIN
TS
TA
Condition
Functional
Relative to VSS
Non-functional
Functional
Min Typ Max Unit
—
— 4.6 V
–0.5 —
4.6 VDC
–65 — 150 °C
–40 —
85 °C
TA
Functional
0
—
85 °C
TJ
Functional
—
—
ØJC
JEDEC (JESD 51)
—
—
ØJA
JEDEC (JESD 51)
—
—
ESDHBM JEDEC (JESD 22 - A114) 2000 —
UL-94
UL (Class)
V–0
150 °C
17 °C/W
35 °C/W
—V
Note: Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply
sequencing is not required.
6
Rev. 1.1