SI53156 Datasheet, PDF (15/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

5. Pin Descriptions: 32-Pin QFN
Si53156
Pin #
1
2
3
4
5
6
7
8
9
10
11
32 31 30 29 28 27 26 25
VDD 1
24 VDD
OE2* 2
23 DIFF5
VDD 3
OE3* 4
OE4* 5
33
GND
22 DIFF5
21 VDD
20 DIFF4
OE5* 6
19 DIFF4
NC 7
18 DIFF3
VDD 8
17 DIFF3
9 10 11 12 13 14 15 16
Name
VDD
OE2
VDD
OE3
OE4
OE5
NC
VDD
DIFF0
DIFF0
DIFF1
*Note: Internal 100 kohm pull-up.
Figure 4. 32-Pin QFN
Table 6. Si53156 32-Pin QFN Descriptions
Type
PWR 3.3 V power supply.
Description
I,PU Active high input pin enables DIFF2 (internal 100 k pull-up).
Refer to Table 1 on page 4 for OE specifications.
PWR 3.3 V Power Supply
I,PU Active high input pin enables DIFF3 (internal 100 k pull-up).
Refer to Table 1 on page 4 for OE specifications.
I,PU Active high input pin enables DIFF4 (internal 100 k pull-up).
Refer to Table 1 on page 4 for OE specifications.
I,PU Active high input pin enables DIFF5 (internal 100 k pull-up).
Refer to Table 1 on page 4 for OE specifications.
NC No connect.
PWR 3.3 V power supply.
O, DIF 0.7 V, 100 MHz differential clock.
O, DIF 0.7 V, 100 MHz differential clock.
O, DIF 0.7 V, 100 MHz differential clock.
Rev. 1.1
15