SI53156 Datasheet, PDF (4/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Si53156
1. Electrical Specifications
Table 1. DC Electrical Specifications
Parameter
3.3 V Operating Voltage
Symbol
VDD core
Test Condition
3.3 ± 5%
Min
Typ
3.135
—
Max Unit
3.465
V
3.3 V Input High Voltage
3.3 V Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Leakage Current
Input Low Leakage Current
3.3 V Output High Voltage
(Single-Ended Outputs)
3.3 V Output Low Voltage
(Single-Ended Outputs)
High-impedance Output
Current
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
Power Down Current
Dynamic Supply Current in
Fanout Mode
V_IH
V_IL
V_IHI2C
V_ILI2C
I_IH
I_IL
V_OH
V_OL
I_OZ
C_IN
C_OUT
L_IN
I_DD__PD
I_{DD_3.3V}
Control input pins
Control input pins
SDATA, SCLK
2.0
— V_DD + 0.3 V
V_SS – 0.3 —
0.8
V
2.2
—
—
V
SDATA, SCLK
—
—
1.0
V
Except internal pull-down
resistors, 0 < V_IN < V_DD
—
—
Except internal pull-up
resistors, 0 < V_IN < V_DD
–5
—
I_OH = –1 mA
2.4
—
5
A
—
A
—
V
I_OL = 1 mA
—
—
0.4
V
–10
—
1.5
—
—
—
—
—
—
—
Differential clocks with 5”
traces and 2 pF load, fre-
—
—
quency at 100 MHz
10
A
5
pF
6
pF
7
nH
1
mA
45
mA
4
Rev. 1.1