SI53154 Datasheet, PDF (6/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER

Si53154
Table 2. AC Electrical Specifications (Continued)
Parameter
Symbol
Additive PCIe Gen 4 Phase RMS_GEN4
Jitter
Additive Cycle to Cycle Jitter T_CCJ
Long-term Accuracy
L_ACC
Rising/Falling Slew rate
T_R/T_F
Condition
PCIe Gen 4
Measured at 0 V differential
Measured at 0 V differential
Measured differentially from
±150 mV
Min Typ Max Unit
—
—
0.10 ps
—
20
50 ps
—
—
100 ppm
2.5
—
8 V/ns
Crossing Point Voltage at
V_OX
0.7 V Swing
Enable/Disable and Setup
300
—
550 mV
Clock Stabilization from
Power-Up
T_STABLE
—
—
Stopclock Set-up Time
T_SS
10.0
—
Notes:
1. Gen 4 specifications based on the PCI-Express Base Specification 4.0 rev. 0.5.
2. Download the Silicon Labs PCIe Clock Jitter Tool at www.silabs.com/pcie-learningcenter.
5
ms
— ns
Table 3. Absolute Maximum Conditions
Parameter
Main Supply Voltage
Input Voltage
Temperature, Storage
Industrial Temperature, Operating
Ambient
Commercial Temperature, Operating
Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Flammability Rating
Symbol
V_{DD_3.3V}
V_IN
T_S
T_A
Condition
Functional
Relative to V_SS
Non-functional
Functional
Min Typ Max Unit
—
— 4.6 V
–0.5 —
4.6 V_DC
–65 — 150 °C
–40 — 85 °C
T_A
Functional
0
— 85 °C
T_J
Functional
—
—
Ø_JC
JEDEC (JESD 51)
—
—
Ø_JA
JEDEC (JESD 51)
—
—
ESD_HBM JEDEC (JESD 22 - A114) 2000 —
UL-94
UL (Class)
V–0
150 °C
35 °C/W
37 °C/W
–
V
Note: Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply
sequencing is not required.
6
Rev. 1.1