SI53154 Datasheet, PDF (13/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 QUAD FANOUT BUFFER

Si53154
Control Register 2. Byte 2
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name DIFF2_OE DIFF3_OE
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset settings = 11000000
Bit
Name
Function
7
DIFF2_OE ^{Output Enable for DIFF2.}
0: Output disabled.
1: Output enabled.
6
DIFF3_OE ^{Output Enable for DIFF3.}
0: Output disabled.
1: Output enabled.
5:0
Reserved
Control Register 3. Byte 3
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name Rev Code Rev Code Rev Code Rev Code Vendor ID Vendor ID Vendor ID Vendor ID
Bit 3
Bit 2
Bit 1
Bit 0
bit 3
bit 2
bit 1
bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset settings = 00001000
Bit
Name
Function
7:4
Rev Code Bit 3:0 Program Revision Code.
3:0
Vendor ID bit 3:0 Vendor Identification Code.
Control Register 4. Byte 4
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
BC7
BC7
BC5
BC4
BC3
BC2
BC1
BC0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset settings = 00000110
Bit
Name
Function
7:0
BC7:0
Byte Count Register.
Rev. 1.1
13