SI4770-77-A20 Datasheet, PDF (50/54 Pages) Silicon Laboratories – HIGH-PERFORMANCE CONSUMER ELECTRONICS

Si4770/77-A20
11. Package Outline
Figure 29. 40-Pin Quad Flat No-Lead (QFN)
Table 20. Package Dimensions
Dimensions
Min
Nom
Max
A
0.80
0.85
0.90
A1
0.00
0.02
0.05
b
0.18
0.25
0.30
D
6.00 BSC.
D2
3.95
4.10
4.25
e
0.50 BSC.
E
6.00 BSC.
E2
3.95
4.10
4.25
L
0.30
0.40
0.50
aaa
0.10
bbb
0.10
ccc
0.08
ddd
0.10
eee
0.05
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-220, Variation VJJD-2.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components.
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Rev. 0.9