SI4770-77-A20 Datasheet, PDF (36/54 Pages) Silicon Laboratories – HIGH-PERFORMANCE CONSUMER ELECTRONICS

Si4770/77-A20
4.10. IBOC Blend Mode for HD Radio
(Si4777 Only)
For HD-Radio reception IBOC blend is supported on the
Si4777. This feature supports the ability to blend
between analog and digital audio. When the bit error
rate (BER) of the HD-Radio digital signal falls below a
predefined threshold (set by the HD-Radio
demodulator) and the digital audio fades out, the analog
audio is blended in. This prevents the received audio
from muting when the digital signal is lost. The audio will
"blend to digital" upon reacquisition of the digital signal.
Figure 22 illustrates the system implementation with a
third party HD-Radio demodulator. ZIF I/Q data is output
to the HD-Radio demodulator. The HD-Radio
demodulator demodulates and decodes the received
HD-Radio signal. It outputs digital audio (I²S three-wire
mode) to the Si4777 where the IBOC blend is
performed. An on-chip asynchronous resampling
converter (ASRC) allows the Si4777 to be slaved to the
HD-Radio demodulator digital audio output at any
sample rate from 32 kHz to 48 kHz.
The HD-R demodulator sends a 1-bit "BLEND" signal to
the Silicon Labs tuner. When this signal is "1", the
Si4777 initiates a crossover from full AM/FM analog
audio into full HD-R audio following a time ramp at a
programmable ramp rate. This process continues until
HD-R audio is fully blended to analog or until the
BLEND bit becomes a "0". When the BLEND bit is "0",
the reverse crossover occurs (crossover from HD-R to
AM/FM analog following a programmable ramp rate).
This process continues until AM/FM is fully blended or
until BLEND becomes "1".
The blended audio can be output on the analog output
pins, LOUT and ROUT and/or a digital audio port to a
third party audio DSP.
An on-chip asynchronous re-sampling converter
(ASRC) allows the Si4777 to be slaved to the Audio
DSP’s digital frame sync and bit clock from 32 kHz to
48 kHz.
Audio level alignment and calibration is implemented in
the Si4777 by multiplying the input HD-R audio signal
by a scaling constant (determined at manufacturing time
in the factory) and a dynamic constant that is HD-R
station-dependent. The dynamic constant is determined
by the HD-R demodulator during reception and is
relayed to the Si4777 by the host controller for the
blend.
4.10.1. IBOC Blend and I²C Device Address
Selection
In applications not requiring HD-Radio reception and
IBOC blend, with the Si4777, two I²C device addresses,
A0 and A1 (pins 11 and 12), are available, allowing up
to four Si4777 receivers to share the same I²C bus (see
"7. I2C Control Bus" on page 44). However in utilizing
IBOC blend for HD-radio reception on the Si4777, only
one device address A0 (pin 11) is available. Pin 12 is
repurposed for the Interrupt output INTB, whilst Pin 18
is repurposed for the digital audio clock input DFS2.
The 7-bit device address consists of a fixed part (6
MSBs), followed by a programmable 1-bit part. The LSB
of the device address signals whether a read or write
I²C operation occurs. The voltage on the A0 pin is used
to set the programmable 1-bit part of the device
address. The A0 pin is tied to ground and or is left to
float for address selection. The various I²C device
addresses can be selected as summarized in Table 16.
Table 16. I²C Device Address Selection in IBOC Blend Mode for Si4777
Device Address [6…1]
110001
110001
Device Address [0]
1
0
A0 Voltage (Pin connection)
VIO1
GND
36
Rev. 0.9