SI4770-77-A20 Datasheet, PDF (28/54 Pages) Silicon Laboratories – HIGH-PERFORMANCE CONSUMER ELECTRONICS

Si4770/77-A20
4.6. Received Signal Qualifiers
A tuned signal's quality can vary with the environmental
conditions, time of day, and geographical location
among many other factors. To adequately manage the
audio output and avoid unpleasant audible effects to the
end-user, the Si4770/77-A20 monitors and provides
indicators of signal quality, allowing the on-chip DSP
and host processor (if required) to perform signal
processing. The Si4770/77-A20 monitors and reports a
set of industry-standard signal quality metrics including
on-channel RSSI, adjacent channel RSSI (100 kHz and
200 kHz), image RSSI, SNR, multi-path interference on
FM signal, ultra-sonic noise, and FM pilot detection. As
with other Si4770/77-A20 features, how these variables
are used to improve audio performance can be left to
the Silicon Labs on-chip algorithms (recommended), or
they can be brought out for host-processor instructions.
4.7. Digital Audio Interface
The digital audio 3-pin interface consists of data serial
lines containing audio data, a bit clock, and a word
frame for left and right channel data. The digital audio
interface operates in slave mode and supports five
different audio data formats:
 I²S Audio
 Left-Justified Audio
 Right-Justified Audio
 DSP Audio
 DSP Left-Justified Audio
4.7.1. Audio Data Formats
In I²S format, by default the MSB is captured on the
second rising edge of DCLK following each DFS
transition. The remaining bits of the word are sent in
order, down to the LSB. The left channel is transferred
first when the DFS is low, and the right channel is
transferred when the DFS is high.
In Left-Justified format, by default, the MSB is captured
on the first rising edge of DCLK following each DFS
transition. The remaining bits of the word are sent in
order, down to the LSB. The left channel is transferred
first when the DFS is high, and the right channel is
transferred when the DFS is low.
In Right-Justified format, by default, the LSB is captured
on the last rising edge of DCLK in each valid DFS
interval. The left channel is transferred first when the
DFS is high, and the right channel is transferred when
the DFS is low.
In DSP format, the DFS becomes a pulse with a width of
one DCLK period. The left channel is transferred first,
followed right away by the right channel. There are two
options in transferring the digital audio data in DSP
format; the MSB of the left channel can be transferred
on the first rising edge of DCLK following the DFS pulse
(left-justified DSP format) or on the second rising edge.
In all audio formats, depending on the word size, DCLK
frequency, and sample rates, there may be unused
DCLK cycles after the LSB of each word before the next
DFS transition and MSB of the next word. In addition, if
preferred, the user can configure the MSB to be
captured on the falling edge of DCLK via properties.
The number of audio bits can be configured for 8, 16,
20, or 24 bits.
4.7.2. Audio Sample Rates
The device supports a number of industry-standard
sampling rates including 32, 40, 44.1, and 48 kHz.
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Rev. 0.9