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SI8900-1 Datasheet, PDF (5/30 Pages) Silicon Laboratories – ISOLATED MONITORING ADC | |||
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Si8900/1/2
Table 2. Electrical Specifications (Continued)
Parameter
Symbol Test Conditions
Min
Typ
Reset and Undervoltage Lockout
Power-on RESET
Voltage Threshold High
VRSTH
â
â
Power-on RESET
Voltage Threshold Low
VRSTL
1.7
â
VDDA Power-On Reset Ramp tRAMP Time from VDDA = 0 V
â
â
Time
to VDDA > VRST
Power-On Reset
Delay Time
Output Side UVLO Threshold
tPOR
UVLO
tRAMP < 1 ms
â
2.3
Output side UVLO
H
Hysteresis
Digital Inputs
â
100
Logic High Level Input Voltage
VIH
Logic Low Level Input Voltage
VIL
Logic Input Current
IIN
Input Capacitance
CIN
Digital Outputs
0.7 x VDDB
â
â
â
VIN = 0 V or VDD
â10
â
15
Logic High Level Output Voltage VOH
Logic Low Level Output Voltage VOL
Digital Output Series Impedance
Serial Ports
ROUT
VDDB = 5 V,
IOH = â4 mA
VDDBâ0.4
4.8
VDDB = 3.3 V,
IOH = â4 mA
3.1
â
VDDB = 3.3 to 5 V,
â
0.2
IOL = 4 mA
â
85
UART Bit Rate
SMBus/I2C Bit Rate
60
â
Slave
â
â
Address = 1111000x
SPI Port
â
â
Max Units
1.8
V
â
V
1
ms
0.3
ms
â
V
â
mV
â
V
0.6
V
+10
µA
â
pF
â
V
â
V
0.4
V
â
ï
234 kbps
240 kbps
2.5 Mbps
Rev. 1.0
5
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