SI8900-1 Datasheet, PDF (20/30 Pages) Silicon Laboratories – ISOLATED MONITORING ADC

Si8900/1/2
6. Applications
6.1. Isolated Outputs
The Si890x serial outputs are internally isolated from the device input side. To ensure safety in the end-user
application, high voltage circuits (i.e., circuits with >30 VAC) must be physically separated from the safety extra-low
voltage circuits (i.e., circuits with <30 VAC) by a certain distance (creepage/clearance). If a component straddles
this isolation barrier, it must meet those creepage/clearance requirements and also provide a sufficiently large
high-voltage breakdown protection rating (commonly referred to as working voltage protection). Tables published in
the component standards (UL1577, IEC60747, CSA 5A) are readily accepted by certification bodies to provide
proof for end-system specifications requirements. Refer to the end-system specification (61010-1, 60950-1, 60601-
1, etc.) requirements before starting any circuit design that uses galvanic isolation. To enhance the robustness of a
design, it is further recommended that the user also include 100  resistors in series with the Si890x inputs and
outputs if the system is excessively noisy. The nominal impedance of an isolated Si890x output channel is
approximately 50  and is a combination of the value of the on-chip series termination resistor and channel
resistance of the output driver FET. When driving loads where transmission line effects are a factor, output pins
should be appropriately terminated with controlled-impedance PCB traces.
The Si890x supply inputs must be bypassed with a parallel combination of 10 µF and 0.1 µF capacitors at VDDA
and VDDB as shown in Figure 15A. The capacitors should be placed as close to the package as possible. The
Si890x uses the VDDA supply as its internal ADC voltage reference by default. A precision external reference can
be installed as shown in Figure 15A and must be bypassed with a parallel combination of 0.1 µF and 4.7 µF
capacitors. (Note that the CNFG_0 VREF bit must be set to 0 when using the external reference.) The Si890x has
an on-chip power on reset circuit (POR) that maintains the device in its reset state until VDDA has stabilized. A
2 k pull-up resistor on RST is strongly recommended to reduce the possibility of external noise coupling into the
reset input. The Si8901 will also require a 5 k pull-up resistor to VDDA on the RSDA input.
VDDA
2.7 V to 3.6 V
2.5 V to 5.5 V
0.1 µF
0.1 µF
Si890x
10 µF
VDDA VDDB
10 µF
VREF
0.1 µF
VREF
4.7 µF
VDDA
5K
2K
RST
Optional External VREF
RSDA
Si8901
Only
GNDA
GNDB
Board Edge
Si890x
GNDA
GNDB
GNDA
8 mm
(min)
GNDB
Keep‐out Area
(No metal in this area)
Board Edge
A
B
Figure 15. Si890x Installation
Figure 15B shows the required PCB ground configuration, where an 8 mm (min) “keep-out area” is provided to
ensure adequate creepage and clearance distances between the two grounds. PCB metal traces cannot be
present or cross through the keep-out area on the PCB top, bottom, or internal layer.
20
Rev. 1.0