SI8900-1 Datasheet, PDF (13/30 Pages) Silicon Laboratories – ISOLATED MONITORING ADC

Si8900/1/2
4.1. UART (Si8900)
The UART is a two-wire interface (Tx, Rx) and operates as an asynchronous, full-duplex serial port with internal
auto baud rate generator that measures the period of incoming data stream and automatically adjusts the internal
baud rate generator to match. The auto baud rate detection and matching optimizes UART timing for minimum bit
error rate. For more information, see “AN635: AC Line Monitoring Using the Si890x Family of Isolated ADCs”.
There are a total of 10 bits per data read/write: One start bit, eight data bits (LSB first), and one stop bit with data
transmitted LSB first as shown in Figure 7. Figure 8A and Figure 8B show master/Si8900 ADC read transactions
for Demand Mode and Burst Mode, respectively.
MARK
SPACE
Start Bit _D0
BIT TIMES
BIT SAMPLING
D1 D2 D3 D4 ^D5
Figure 7. UART Data Byte
D6
D7 _{STOP BIT}
Master to Slave
Slave to Master
CNFG_0 Write Command Byte
S
‐
1 1P
D0 D1 D2 D3 D4 D5 D6 D7
ADC Data
S
‐
11PS
01PS0
0S
CNFG_0 Write Command Byte
S
‐
1 1P
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
CNFG_0 Read Data
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
A) Si8900 Demand Mode ADC Read
Periodic ADC Data
S_‐
11PS
01PS0
0P S
01PS0
0P S
D0 D1 D2 D3 D4 D5 D6 D7
CNFG_0 Read Data
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
B) Si8900 Burst Mode ADC Read
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
Figure 8. Si8900 ADC Read Operation
Rev. 1.0
13