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SI5368 Datasheet, PDF (4/18 Pages) Silicon Laboratories – ANY-RATE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Si5368
155.52 MHz in, 622.08 MHz out
0
-20
-40
-60
-80
-100
-120
-140
-160
100
1000
10000
100000
1000000
Offset Frequency (Hz)
Figure 1. Typical Phase Noise Plot
10000000 100000000
Table 2. Absolute Maximum Ratings
Parameter
DC Supply Voltage
LVCMOS Input Voltage
Junction Temperature
Storage Temperature Range
ESD HBM Tolerance (100 pF, 1.5 kΩ)
Symbol
VDD
VDIG
TJCT
TSTG
Value
–0.5 to 2.75
–0.3 to (VDD + 0.3)
–55 to 150
–55 to 150
2
Unit
V
V
ºC
ºC
kV
ESD MM Tolerance
200
V
Latch-Up Tolerance
JESD78 Compliant
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.
4
Preliminary Rev. 0.3