|
SI5356A Datasheet, PDF (28/29 Pages) Silicon Laboratories – IC PROGRAMMABLE, ANY-FREQUENCY 1–200 MHZ, QUAD FREQUENCY 8-OUTPUT CLOCK GENERATOR | |||
|
◁ |
Si5356A
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
ï® Improved specification details on input signals.
ï® Added phase and cycle-cycle jitter specifications.
ï® Added thermal resistance junction to case.
ï® Improved application circuits.
ï® Added GND via requirement details.
ï® Added differential CMOS capability.
Revision 0.2 to Revision 0.3
ï® Added Section â3.1. Overviewâ
ï® Updated Section â3.2. Input Configurationâ
ï® Updated Section â3.4. Frequency Configurationâ
ï® Added Section â3.5. Configuring the Si5356â
ï® Added Section â4. Si5356 Registersâ
ï® Added Section â9. Top Markingâ
ï® Updated âFigure 10. Peak-to-Peak Additive Phase
Jitter from 100 mV Sine Wave on Supplyâ
Revision 0.3 to Revision 1.0
ï® Renamed part number on page header from Si5356
to Si5356A.
ï® Updated Table 2. DC Characteristics.
ï¬ï Added IDDOx specification.
ï¬ï Corrected Pn Input Resistance specification.
ï® Updated Table 3, âAC Characteristics,â on page 5.
ï¬ï Added 10â90% input clock rise/fall time.
ï¬ï Added LOS assert/deassert time.
ï¬ï Added note on jitter test.
ï¬ï Updated 20â80% rise/fall time with CL = 15 pF for
output clocks to the maximum value of 2.0 ns.
ï¬ï Changed Frequency Synthesis Resolution spec to the
correct value of 1ppb max.
ï® Updated recommended crystal load parameters in
Table 4 on page 6.
ï® Updated Table 6 on page 7.
ï¬ï Added Soldering profile specification
ï¬ï Corrected Input Voltage Range (VI2) to 1.3 V (max).
ï¬ï Added packaging/RoHS information.
ï® Removed section â3.5.4. Modifying a MultiSynth
Output Divider Ratio/Frequency Configuration.â
ï® Removed output-to-output skew spec from text in
section "3.7. CMOS Output Drivers" to prevent
duplicating spec in âTable 3. AC Characteristics.â
ï® Removed jitter spec from text in section "3.8. Jitter
Performance" to prevent duplicating spec in
âTable 3. AC Characteristics.â
ï® Added Evaluation Board information to the Ordering
Guide.
Revision 1.0 to Revision 1.1
ï® Updated Figure 5 on page 13 to provide workaround
for spread spectrum errata.
ï® Added " Document Change List" on page 28.
Revision 1.1 to Revision 1.2
ï® Removed down spread spectrum errata that has
been corrected in Revision B.
ï® Updated ordering information to refer to Revision B
silicon.
ï® Updated top marking explanation in table.
ï® Added further explanation to describe revision-
specific behavior of center spread spectrum in
Section 3.11
Revision 1.2 to Revision 1.3
ï® Added link to errata document.
28
Rev. 1.3
|
▷ |