SI5356A Datasheet, PDF (22/29 Pages) Silicon Laboratories – IC PROGRAMMABLE, ANY-FREQUENCY 1–200 MHZ, QUAD FREQUENCY 8-OUTPUT CLOCK GENERATOR

Si5356A
Table 8. Si5356 Pin Descriptions (Continued)
18
19
20
21
22
23
24
GND
PAD
CLK2
SDA
VDDOA
CLK1
CLK0
GND
VDD
GND
O ^{Output Clock 2.}
CMOS output clock. If unused, this pin must be left floating.
I/O _I²_{C Serial Data (3.3 V Tolerant).}
VDD ^{Clock Output Bank A Supply Voltage.}
Power supply for clock outputs 0 and 1. May be operated from a 1.8, 2.5, or 3.3 V sup-
ply. A 0.1 μF bypass capacitor should be located very close to this pin. If CLK0/1 are not
used, this pin must be tied to pin 7 and/or pin 24 or a voltage rail > 1.5 V.
O ^{Output Clock 1.}
CMOS output clock. If unused, this pin must be left floating.
O ^{Output Clock 0.}
CMOS output clock. If unused, this pin must be left floating.
GND ^Ground.
Must be connected to system ground. Minimize the ground path impedance for optimal
performance of the device.
VDD ^{Core Supply Voltage.}
The device operates from a 1.8, 2.5, or 3.3 V supply. A 0.1 μF bypass capacitor should
be located very close to this pin.
GND ^{Ground Pad.}
This is the large pad in the center of the package. The device will not function unless the
ground pad is properly connected to a ground plane on the PCB. See "8. Recom-
mended PCB Land Pattern" on page 25 for the PCB pad sizes and ground via require-
ments.
22
Rev. 1.3