SI570 Datasheet, PDF (24/26 Pages) Silicon Laboratories – ANY-RATE I2C PROGRAMMABLE XO/VCXO

Si570/Si571
10. 8-Pin PCB Land Pattern
Figure 7 illustrates the 8-pin PCB land pattern for the Si570/Si571. Table 17 lists the values for the dimensions
shown in the illustration.
Figure 7. Si570/Si571 PCB Land Pattern
Table 17. PCB Land Pattern Dimensions (mm)
Dimension
D2
D3
e
E2
GD
GE
VD
VE
X1
X2
Y1
Y2
ZD
ZE
Min
Max
5.08 REF
5.705 REF
2.54 BSC
4.20 REF
0.84
—
2.00
—
8.20 REF
7.30 REF
1.70 TYP
1.545 TYP
2.15 REF
1.3 REF
—
6.78
—
6.30
Note:
1. Dimensioning and tolerancing per the ANSI Y14.5M-1994
specification.
2. Land pattern design follows IPC-7351 guidelines.
3. All dimensions shown are at maximum material condition
(MMC).
4. Controlling dimension is in millimeters (mm).
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Rev. 0.3