SI53321 Datasheet, PDF (21/28 Pages) Silicon Laboratories – 1:10 LOW JITTER LVPECL CLOCK BUFFER

5.2. 32-QFN Package Diagram
Si53321
Figure 15. Si53321 32-QFN Package Diagram
Table 15. Package Dimensions
Dimension
MIN
A
0.80
NOM
0.85
MAX
0.90
A1
0.00
0.02
0.05
b
0.18
0.25
0.30
c
0.20
0.25
0.30
D
5.00 BSC
D2
2.00
2.15
2.30
e
0.50 BSC
E
5.00 BSC
E2
2.00
2.15
2.30
L
0.30
0.40
0.50
aaa
0.10
bbb
0.10
ccc
0.08
ddd
0.10
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220.
4. Recommended card reflow profile is per the JEDEC Solid State Outline MO-220.
Rev. 1.0
21