SI53321 Datasheet, PDF (18/28 Pages) Silicon Laboratories – 1:10 LOW JITTER LVPECL CLOCK BUFFER

Si53321
Table 13. Si53321 32-eLQFP and 32-QFN Pin Descriptions (Continued)
Pin #
24
Name
Q3
Type*
O Output clock 3.
Description
25
VDD
26
Q2
P Core voltage supply.
Bypass with 1.0 µF capacitor and place as close to the V_DD pin as possible.
O Output clock 2 (complement).
27
Q2
O Output clock 2.
28
Q1
O Output clock 1 (complement).
29
Q1
O Output clock 1.
30
Q0
O Output clock 0 (complement).
31
Q0
O Output clock 0.
32
V_DD
GND
Pad
Exposed
ground
pad
P
GND
Core voltage supply.
Bypass with 1.0 µF capacitor and place as close to the V_DD pin as possible.
Ground Pad - Power supply ground and thermal relief.
The exposed ground pad is thermally connected to the die to improve the heat
transfer out of the package. The ground pad must be connected to GND to ensure
device specifications are met.
*Pin types are: I = input, O = output, P = power, GND = ground.
18
Rev. 1.0