EFM8BB1 Datasheet, PDF (2/46 Pages) Silicon Laboratories – The EFM8BB1 highlighted features are listed below

EFM8BB1 Data Sheet
Feature List
1. Feature List
The EFM8BB1 highlighted features are listed below.
• Core:
• Pipelined CIP-51 Core
• Fully compatible with standard 8051 instruction set
• 70% of instructions execute in 1-2 clock cycles
• 25 MHz maximum operating frequency
• Memory:
• Up to 8 kB flash memory, in-system re-programmable
from firmware.
• Up to 512 bytes RAM (including 256 bytes standard 8051
RAM and 256 bytes on-chip XRAM)
• Power:
• Internal LDO regulator for CPU core voltage
• Power-on reset circuit and brownout detectors
• I/O: Up to 18 total multifunction I/O pins:
• All pins 5 V tolerant under bias
• Flexible peripheral crossbar for peripheral routing
• 5 mA source, 12.5 mA sink allows direct drive of LEDs
• Clock Sources:
• Internal 24.5 MHz oscillator with ±2% accuracy
• Internal 80 kHz low-frequency oscillator
• External CMOS clock option
• Timers/Counters and PWM:
• 3-channel programmable counter array (PCA) supporting
PWM, capture/compare, and frequency output modes
• 4 x 16-bit general-purpose timers
• Independent watchdog timer, clocked from the low frequen-
cy oscillator
• Communications and Digital Peripherals:
• UART
• SPI™ Master / Slave
• SMBus™/I2C™ Master / Slave
• 16-bit CRC unit, supporting automatic CRC of flash at 256-
byte boundaries
• Analog:
• 12-Bit Analog-to-Digital Converter (ADC)
• 2 x Low-current analog comparators with adjustable refer-
ence
• On-Chip, Non-Intrusive Debugging
• Full memory and register inspection
• Four hardware breakpoints, single-stepping
• Pre-loaded UART bootloader
• Temperature range -40 to 85 ºC
• Single power supply 2.2 to 3.6 V
• QSOP24, SOIC16, and QFN20 packages
With on-chip power-on reset, voltage supply monitor, watchdog timer, and clock oscillator, the EFM8BB1 devices are truly standalone
system-on-a-chip solutions. The flash memory is reprogrammable in-circuit, providing non-volatile data storage and allowing field up-
grades of the firmware. The on-chip debugging interface (C2) allows non-intrusive (uses no on-chip resources), full speed, in-circuit
debugging using the production MCU installed in the final application. This debug logic supports inspection and modification of memory
and registers, setting breakpoints, single stepping, and run and halt commands. All analog and digital peripherals are fully functional
while debugging. Each device is specified for 2.2 to 3.6 V operation, is AEC-Q100 qualified, and is available in 20-pin QFN, 16-pin
SOIC or 24-pin QSOP packages. All package options are lead-free and RoHS compliant.
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