SI5310 Datasheet, PDF (19/26 Pages) Silicon Laboratories – PRECISION CLOCK MULTIPLIER/REGENERATOR IC

5. Pin Descriptions: Si5310
Si5310
20 19 18 17 16
REXT 1
15 ^PWRDN
VDD 2
GND 3
REFCLK+ 4
GND
Pad
14 VDD
13 CLKOUT+
12 CLKOUT–
REFCLK– 5
11 VDD
6 7 8 9 10
Top View
Figure 11. Si5310 Pin Configuration
Pin #
1
Pin Name
REXT
2, 7, 11, 14
3, 8, 18, and
GND Pad
VDD
GND
4, 5
REFCLK+, REF-
CLK–
6
LOL
9, 10
CLKIN+, CLKIN–
Table 11. Si5310 Pin Descriptions
I/O Signal Level
Description
External Bias Resistor.
This resistor is used by onboard circuitry to establish
bias currents within the device. This pin must be
connected to GND through a 10 kΩ (1%) resistor.
2.5 V
Supply Voltage.
Nominally 2.5 V.
GND
Supply Ground.
Nominally 0.0 V. The GND pad found on the bottom
of the 20-pin micro leaded package (see Figure 12)
must be connected directly to supply ground.
I
See Table 2 ^{Differential Reference Clock.}
The reference clock sets the initial operating fre-
quency used by the onboard PLL for clock regenera-
tion and multiplication. Additionally, the reference
clock is used as a reference in generation of the LOL
output and to bound the frequency drift of MULTOUT
when CLKIN is not present.
O
LVTTL ^{Loss of Lock.}
This output is driven high when a divided version of
the clock multiplier output deviates from the refer-
ence clock frequency by the amount specified in
Table 4 on page 8.
I
See Table 2 ^{Differential Clock Input.}
Differential input clock from which MULTOUT is
derived.
Rev. 1.2
19