SI8220 Datasheet, PDF (15/31 Pages) Silicon Laboratories – 0.5 AND 2.5 AMP ISODRIVERS WITH OPTO INPUT (2.5, 3.75, AND 5.0 KVRMS)

Si8220/21
5.3. Under Voltage Lockout (UVLO)
The UVLO circuit unconditionally drives V_O low when V_DD is below the lockout threshold. Referring to Figures 9
through 12, upon power up, the Si8220/21 is maintained in UVLO until VDD rises above VDD_UV+. During power
down, the Si8220/21 enters UVLO when VDD falls below the UVLO threshold plus hysteresis (i.e., VDD < VDD_UV+
– VDD_HYS).
VDDUV+ (Typ)
VDDUV+ (Typ)
3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
Supply Voltage (V_DD - V_SS) (V)
Figure 9. Si8220/21 UVLO Response (5 V)
VDDUV+ (Typ)
8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5
Supply Voltage (V_DD - V_SS) (V)
Figure 11. Si8220/21 UVLO Response (10 V)
VDDUV+ (Typ)
6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0
Supply Voltage (V_DD - V_SS) (V)
Figure 10. Si8220/21 UVLO Response (8 V)
11.3 11.8 12.3 12.8 13.3 13.8 14.3 14.8 15.3
Supply Voltage (V_DD - V_SS) (V)
Figure 12. Si8220/21 UVLO Response (12.5 V)
Rev. 1.5
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