SI5323 Datasheet, PDF (15/16 Pages) Silicon Laboratories – PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
„ Changed LVTTL to LVCMOS in Table 2, “Absolute
Maximum Ratings,” on page 3.
„ Added Figure 1, “Typical Phase Noise Plot,” on page
4.
„ Updated Figure 2, “Si5323 Typical Application
Circuit,” on page 5 to show external reference
interface.
„ Added RATE0 and expanded the RATE[1:0]
description in 2. ‘Pin Descriptions: Si5323”.
„ Updated 3."Ordering Guide" on page 11.
„ Added 5. ‘Recommended PCB Layout”.
Si5323
Preliminary Rev. 0.2
15