SI554 Datasheet, PDF (14/15 Pages) Silicon Laboratories – QUAD FREQUENCY VOLTAGE-CONTROLLED CRYSTAL

Si554
DOCUMENT CHANGE LIST
Revision 0.6 to Revision 1.0
 Updated Table 4 on page 3.
Updated 2.5 V/3.3 V and 1.8 V CML output level
specifications.
 Updated Table 5 on page 4.
Removed the words “Differential Modes:
LVPECL/LVDS/CML” in the footnote referring to AN256.
Added footnotes clarifying max offset frequency test
conditions.
Added CMOS phase jitter specs.
 Updated Table 10 on page 8.
Separated 1.8 V, 2.5 V/3.3 V supply voltage
specifications.
Updated ESD HBM sensitivity rating.
 Updated and clarified Table 8 on page 7
Added “Moisture Sensitivity Level” and “Contact Pads”
rows.
 Updated 6. "Top Marking" on page 13 to reflect
specific marking information (previously, figure was
generic).
 Updated 4. "Package Outline and Suggested Pad
Layout" on page 11.
Added cyrstal impedance pin in Figure 2 on page 11 and
Table 12 on page 11.
 Reordered spec tables and back matter to conform
to data sheet quality conventions.
Revision 1.0 to Revision 1.1
 Added Table 9, “Thermal Characteristics,” on
page 7.
14
Rev. 1.1