SLWSTK6000A Datasheet, PDF (10/80 Pages) Silicon Laboratories – ConfidentialMighty Gecko Wireless SoC EFR32MG1X232

EFR32MG1X232 Data Sheet
System Overview
3.3.29 Low Energy Timer (LETIMER^TM)
Confidential ^{The unique LETIMER, is a 16-bit timer that is available in energy mode EM2 DeepSleep in addition to EM1 Sleep and EM0 Active. This}
allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed
while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of wave-
forms with minimal software intervention. It is also connected to the Real Time Counter and Calendar (RTCC), and can be configured to
start counting on compare matches from the RTCC.
3.3.30 Ultra Low Power Wake-up Timer (CRYOTIMER)
The CRYOTIMER is a 32-bit counter that is capable of running in all energy modes. It can be clocked by either the 32.768 kHz crystal
oscillator (LFXO), the 32.768 kHz RC oscillator (LFRCO) or the 1 kHz RC oscillator (ULFRCO). It can provide periodic Wakeup events
and PRS signals which can be used to wake up peripherals from any energy mode. The CRYOTIMER provides a wide range of inter-
rupt periods, facilitating flexible ultra-low energy operation.
3.3.31 Pulse Counter (PCNT)
The Pulse Counter (PCNT) peripheral can be used for counting pulses on a single input or to decode quadrature encoded inputs. The
clock for PCNT is selectable from either an external source on pin PCTNn_S0IN or from an internal timing reference, selectable from
among any of the internal oscillators, except the AUXHFRCO. The module may operate in energy mode EM0 Active, EM1 Sleep, EM2
DeepSleep and EM3 Stop.
3.3.32 General Purpose Input/Output (GPIO)
EFR32MG1X232 has 31 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output or input.
More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin.
The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be routed to sev-
eral GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other peripherals.
The GPIO subsystem supports asynchronous external pin interrupts.
3.3.33 Analog Port (APORT)
The Analog Port (APORT) is an analog interconnect matrix allowing access to analog modules ADC, ACMP, and IDAC on a flexible
selection of pins. Each APORT bus consists of analog switches connected to a common wire. Since many clients can operate differen-
tially, buses are grouped by X/Y pairs. See 6.4 Analog Port (APORT) for an illustration of the APORT connections.
3.3.34 Analog Comparator (ACMP)
The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is high-
er. Inputs are selected from among internal references and external pins. The tradeoff between response time and current consumption
is configurable by software.
The ACMP can also be used to monitor the supply voltage from software. An interrupt can be generated when the supply falls below or
rises above a programmable threshold.
3.3.35 Analog to Digital Converter (ADC)
The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to 1 MSamples/s. The
output sample resolution is configurable and additional resolution is possible using integrated hardware for averaging over multiple
samples.
The ADC includes integrated voltage references and an integrated temperature sensor. Inputs are selectable from a wide range of
source, including pins configurable as either single-ended or differential.
3.3.36 Digital to Analog Current Converter (IDAC)
The Digital to Analog Current Converter can source or sink a configurable constant current. This current can be driven on an output pin
or routed to the selected ADC input pin for capacitive sensing. The current is programmable between 0.05 µA and 64 µA with several
ranges with various step sizes.
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