S-8241ABKMC-GBKT2G Datasheet, PDF (22/39 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 1-CELL PACK

BATTERY PROTECTION IC FOR 1-CELL PACK
S-8241 Series
Rev.9.1_00
6. Abnormal Charge Current Detection
If the VM pin voltage drops below the charger detection voltage (V_CHA) during charging under the normal status and it
continues for the overcharge detection delay time (t_CU) or longer, the S-8241 turns the charging control FET off and
stops charging. This action is called abnormal charge current detection.
Abnormal charge current detection works when the discharging control FET is on (DO pin voltage is “H”) and the VM pin
voltage drops below the charger detection voltage (V_CHA). When an abnormal charge current flows into a battery in the
overdischarge status, the S-8241 consequently turns the charging control FET off and stops charging after the battery
voltage becomes the overdischarge detection voltage or higher (DO pin voltage becomes “H”) and the overcharge
detection delay time (t_CU) elapses.
Abnormal charge current detection is released when the voltage difference between VM pin and VSS pin becomes
lower than the charger detection voltage (V_CHA) by separating the charger.
Since the 0 V battery charging function has higher priority than the abnormal charge current detection function,
abnormal charge current may not be detected by the product with the 0 V battery charging function while the battery
voltage is low.
7. Delay Circuits
The detection delay times are determined by dividing a clock of approximately 2 kHz by the counter.
[Example] Overcharge detection delay time (= abnormal charge current detection delay time): 1.0 s
Overdischarge detection delay time: 125 ms
Overcurrent 1 detection delay time: 8 ms
Overcurrent 2 detection delay time: 2 ms
Caution 1. Counting for the overcurrent 2 detection delay time starts when the overcurrent 1 is detected.
Having detected the overcurrent 1, if the overcurrent 2 is detected after the overcurrent 2 detection
delay time, the S-8241 turns the discharging control FET off as shown in the Figure 6. In this case,
the overcurrent 2 detection delay time may seem to be longer or overcurrent 1 detection delay time
may seem to be shorter than expected.
VDD
DO pin
V_SS
VM pin
VDD
VIOV2
V_IOV1
V_SS
Overcurrent 2 detection delay time (t_IOV2)
Figure 6
Time
Time
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Seiko Instruments Inc.