C511_1 Datasheet, PDF (91/128 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Interrupt System
7.2 Interrupt Control Bits
7.2.1 Interrupt Enables
Each interrupt vector can be individually enabled or disabled by setting or clearing the
corresponding bit in the SFR IE (Interrupt Enable). This register also contains the global disable bit
EA, which can be cleared/set to disable/enable all interrupts at once.
Special Function Registers IE (Address A8H)
Reset Value : 00H
MSB
LSB
Bit No. 7
6
5
4
3
2
1
0
A8H EA ESSC ET2 ES ET1 EX1 ET0 EX0 IE
Bit
EA
ESSC
ET2
ES
ET1
EX1
ET0
EX0
Function
Disables all Interrupts.
If EA=0, no interrupt will be acknowledged.
If EA=1, each interrupt source is individually enabled or disabled by
setting or clearing its enable bit.
SSC Interrupt Enable
If ESSC = 0 the interrupt of the synchronous serial channel is
disabled
Timer 2 Interrupt Enable.
If ET2 = 0, the timer 2 interrupt is disabled.
USART Serial Channel Interrupt Enable
(C513/C513A/C513A-H only)
If ES = 0, the serial channel interrupt is disabled.
Timer 1 Overflow Interrupt Enable.
If ET1 = 0, the timer 1 interrupt is disabled.
External Interrupt 1 Enable.
If EX1 = 0, the external interrupt 1 is disabled.
Timer 0 Overflow Interrupt Enable.
If ET0 = 0, the timer 0 interrupt is disabled.
External Interrupt 0 Enable.
If EX0 = 0, the external interrupt 0 is disabled.
Semiconductor Group
7-4