C511_1 Datasheet, PDF (26/128 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
Table 3-2
Contents of the SFRs, SFRs in Numeric Order of their Addresses (cont’d)
Addr Register
87_H PCON
88_H
89_H
8A_H
8B_H
8C_H
8D_H
90_H
98_H
99_H
A0_H
A8_H
B0_H
B1_H
B8_H
TCON
TMOD
TL0
TL1
TH0
TH1
P1
SCON
SBUF
P2
IE
P3
SYSCON
IP
C8_H T2CON
Content
after
Reset ¹⁾
0XXX-
0000_B
00_H
00_H
00_H
00_H
00_H
00_H
FF_H
00_H
XX_H
FF_H
00_H
FF_H
2)
X000-
0000_B
00_H
Bit 7
SMOD
TF1
GATE
.7
.7
.7
.7
–
SM0
.7
.7
EAL
RD
1
–
TF2
Bit 6
–
TR1
C/T
.6
.6
.6
.6
–
SM1
.6
.6
ESSC
WR
0
PSSC
EXF2
C9_H
CA_H
CB_H
CC_H
CD_H
D0_H
E0_H
E8_H
E9_H
EA_H
EB_H
F0_H
F8_H
T2MOD
RC2L
RC2H
TL2
TH2
PSW
ACC
SSCCON
STB
SRB
SSCMOD
B
SCF
XXXX-
XXX0_B
00_H
00_H
00_H
00_H
00_H
00_H
07_H
XX_H
XX_H
00_H ³⁾
00_H
XXXX-
XX00_B
–
.7
.7
.7
.7
CY
.7
SCEN
.7
.7
0
.7
–
–
.6
.6
.6
.6
AC
.6
TEN
.6
.6
0
.6
–
Bit 5 Bit 4
–
–
TF0
M1
.5
.5
.5
.5
SLS
SM2
.5
.5
ET2
T1
EALE
PT2
TR0
M0
.4
.4
.4
.4
STO
REN
.4
.4
ES0
T0
–
PS
RCLK TCLK
–
–
.5
.5
.5
.5
F0
.5
MSTR
.5
.5
0
.5
–
.4
.4
.4
.4
RS1
.4
CPOL
.4
.4
0
.4
–
Bit 3 Bit 2
GF1 GF0
IE1
GATE
.3
.3
.3
.3
SRI
TB8
.3
.3
ET1
INT1
0
PT1
IT1
C/T
.2
.2
.2
.2
SCLK
RB8
.2
.2
EX1
INT0
–
PX1
EXEN2 TR2
–
–
.3
.3
.3
.3
RS0
.3
CPHA
.3
.3
0
.3
–
.2
.2
.2
.2
OV
.2
BRS2
.2
.2
0
.2
–
Bit 1 Bit 0
PDE IDLE
IE0
M1
.1
.1
.1
.1
T2EX
TI
.1
.1
ET0
TxD
–
PT0
IT0
M0
.0
.0
.0
.0
T2
RI
.0
.0
EX0
RxD
XMAP²⁾
PX0
C/T2
–
CP/
RL2
DCEN
.1
.1
.1
.1
F1
.1
BRS1
.1
.1
0
.1
WCOL
.0
.0
.0
.0
P
.0
BRS0
.0
.0
0
.0
TC
Semiconductor Group
3-6