C511_1 Datasheet, PDF (46/128 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Units
6.1.4.2 Port Loading and Interfacing
The output buffers of ports 1, 2 and 3 can drive TTL inputs directly. The maximum port load which
still guarantees correct logic output levels can be be seen in the Data Sheet of the SAB-C511/513
family members. The corresponding DC parameters are V_OL and V_OH.
The same applies to port 0 output buffers. They do, however, require external pullups to drive
floating inputs, except when being used as the address/data bus.
When used as inputs it must be noted that the ports 1, 2 and 3 are not floating but have internal
pullup transistors. The driving devices must be capable of sinking a sufficient current if a logic low
level shall be applied to the port pin (the parameters I_TL and I_IL in the DC characteristics specify
these currents). Port 0 has floating inputs when used for digital input.
6.1.4.3 Read-Modify-Write Feature of Ports 1, 2 and 3
Some port-reading instructions read the latch and others read the pin (see figure 6-13). The
instructions reading the latch rather than the pin read a value, possibly change it, and then rewrite
it to the latch. These are called "read-modify-write"- instructions, which are listed in table 6-4. If the
destination is a port or a port pin, these instructions read the latch rather than the pin. Note that all
other instructions which can be used to read a port, exclusively read the port pin. In any case,
reading from latch or pin, resp., is performed by reading the SFR P0, P1, P2 and P3; for example,
"MOV A, P1" reads the value from port 3 pins, while "ANL P1, #0AAH" reads from the latch, modifies
the value and writes it back to the latch.
It is not obvious that the last three instructions in table 6-4 are read-modify-write instructions, but
they are. The reason is that they read the port byte, all 8 bits, modify the addressed bit, then write
the complete byte back to the latch.
Table 6-4
"Read-Modify-Write"-Instructions
Instruction
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV Px.y,C
CLR Px.y
SETB Px.y
Function
Logic AND; e.g. ANL P1, A
Logic OR; e.g. ORL P2, A
Logic exclusive OR; e.g. XRL P3, A
Jump if bit is set and clear bit; e.g. JBC P1.1, LABEL
Complement bit; e.g. CPL P3.0
Increment byte; e.g. INC P1
Decrement byte; e.g. DEC P1
Decrement and jump if not zero; e.g. DJNZ P3, LABEL
Move carry bit to bit y of port x
Clear bit y of port x
Set bit y of port x
Semiconductor Group
6-13