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HYB514175BJ-50- Datasheet, PDF (7/22 Pages) Siemens Semiconductor Group – 256k x 16-Bit EDO-DRAM
HYB 514175BJ-50/-55/-60
256k × 16 EDO-DRAM
AC Characteristics (cont’d)5, 6
TA = 0 to 70 °C; VSS = 0 V; VCC = 5 V ± 10 %, tT = 2 ns
Parameter
Symbol
Limit Values
Unit Note
-50
-55
-60
min. max. min. max. min. max.
RAS hold time
CAS hold time
CAS to RAS precharge time
Transition time (rise and fall)
Refresh period
tRSH 13 – 13 – 15 – ns
tCSH 40 – 45 – 50 – ns
tCRP
5
–
5
–
5
–
ns
tT
1 50 1 50 1 50 ns 7
tREF
–
16 –
16 –
16 ms
Read Cycle
Access time from RAS
tRAC
Access time from CAS
tCAC
Access time from column address tAA
OE access time
tOEA
Column address to RAS lead time tRAL
Read command setup time
tRCS
Read command hold time
tRCH
Read command hold time ref. to RAS tRRH
CAS to output in low-Z
tCLZ
Output buffer turn-off delay from CAS tOFF
Output buffer turn-off delay from OE tOEZ
Data to OE low delay
tDZO
CAS high to data delay
tCDD
OE high to data delay
tODD
– 50 – 55 – 60 ns 8, 9
– 13 – 13 – 15 ns 8, 9
– 25 – 25 – 30 ns 8, 10
– 13 – 13 – 15 ns
25 – 25 – 30 – ns
0 – 0 – 0 – ns
0 – 0 – 0 – ns 11
0 – 0 – 0 – ns 11
0 – 0 – 0 – ns 8
0 13 0 13 0 15 ns 12
0 13 0 13 0 15 ns 12
0 – 0 – 0 – ns 13
10 –
10 –
10 –
10 –
13 –
13 –
ns 14
ns 14
Write Cycle
Write command hold time
Write command pulse width
Write command setup time
Write command to RAS lead time
Write command to CAS lead time
Data setup time
Data hold time
Data to CAS low delay
tWCH
tWP
tWCS
tRWL
tCWL
tDS
tDH
tDZC
8–
8–
0–
13 –
13 –
0–
8–
0–
8–
8–
0–
13 –
13 –
0–
8–
0–
10 –
10 –
0–
15 –
15 –
0–
10 –
0–
ns
ns
ns 15
ns
ns
ns 16
ns 16
ns 13
Semiconductor Group
7
1998-10-01