SDA9280 Datasheet, PDF (22/43 Pages) Siemens Semiconductor Group – ICs for Consumer Electronics

SDA 9280 B22
2.12 I²C-Bus Control
2.12.1 I²C-Bus Address
0010110
2.12.2 I²C-Bus Format
write:
S 0 0 1 0 1 1 0 0 A Subaddress A
read:
Data Byte
A _*****
AP
S 0 0 1 0 1 1 0 1 A Data Byte n A Data Byte (n+1) A _***** NA P
Reading starts at the last write address n. Specification of a subaddress in reading mode
is not possible.
S: Start condition
A: Acknowledge
P: Stop condition
NA: Not acknowledge
An automatical address increment function is implemented.
After switching on the IC (RES = 0), all bits are set to defined states. Except the following
bits the reset state is “0”. The bits YDEL13, BCOF2, LCOF2, HCOF2, DIVREF2,
DIVVCO2 are set to “1” to ensure a basic working condition.
In order to avoid distortions of the picture during the active lines, the following bits are
updated internally only during the HIGH-phase of VS (the programming of the Ι²C-Bus
interface however is not affected by this synchronisation):
Subaddress
00_H
02_H
03_H
04_H
05_H
06_H
Bit
D1 ... D0
D4 ... D0
D7 ... D0
D6 ... D0
D6 ... D0
D7 ... D0
Subaddress
07_H
09_H
0A_H
0B_H
0F_H
Bit
D2 ... D0
D7 ... D0
D7 ... D0
D6 ... D0
D0
Semiconductor Group
22
1998-02-01